期刊名称：ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS ISSN： 1550-4832 出版频率： Quarterly 出版社： ASSOC COMPUTING MACHINERY, 2 PENN PLAZA, STE 701, NEW YORK, USA, NY, 10121-0701   出版社网址： http://www.acm.org/ 期刊网址： http://jetc.acm.org/ 影响因子： 1.42 主题范畴： COMPUTER SCIENCE, HARDWARE & ARCHITECTURE;    ENGINEERING, ELECTRICAL & ELECTRONIC;    NANOSCIENCE & NANOTECHNOLOGY 期刊简介(About the journal)    投稿须知(Instructions to Authors)    编辑部信息(Editorial Board)    About the journal The ACM Journal on Emerging Technologies in Computing Systems invites submissions of original technical papers describing research and development in emerging technologies in computing systems. Major economic and technical challenges are expected to impede the continued scaling of semiconductor devices. This has resulted in the search for alternate mechanical, biological/biochemical, nanoscale electronic, asynchronous and quantum computing and sensor technologies. As the underlying nanotechnologies continue to evolve in the labs of chemists, physicists, and biologists, it has become imperative for computer scientists and engineers to translate the potential of the basic building blocks (analogous to the transistor) emerging from these labs into information systems. Their design will face multiple challenges ranging from the inherent (un)reliability due to the self-assembly nature of the fabrication processes for nanotechnologies, from the complexity due to the sheer volume of nanodevices that will have to be integrated for complex functionality, and from the need to integrate these new nanotechnologies with silicon devices in the same system. The journal provides comprehensive coverage of innovative work in the specification, design analysis, simulation, verification, testing, and evaluation of computing systems constructed out of emerging technologies and advanced semiconductors. Topics include, but are not limited to: Logic Primitive Design and Synthesis: how to design computational logic primitives from the new nanotechnologies, and design tools supporting their effective design and verification, System-Level Specification, Design and Synthesis: how to interconnect these computational primitives to build complete information systems, and design tools for specifying, synthesizing, and verifying such systems, Software-Level Specification, Design and Synthesis: how to develop the necessary software so that applications can be effectively mapped onto information systems implemented using these new nanotechnologies, and tools for generating and verifying the software, and Mixed-Technology Systems: how to interface across potentially hybrid nanotechnologies that may co-exist in the same information system. JETC is published quarterly and the online paper submission server is at http://acm.manuscriptcentral.com. Select the Journal of Emerging Technologies in Computing in the pull down menu option at ACM manuscript central submission page. You may also go directly at http://mc.manuscriptcentral.com/jetc. Please open the link in a new window or tab to avoid any upload problems. Also please allow pop-up windows at manuscript central page to complete your submission. JETC publishes research papers (approximately 20 double spaced pages, 10 point font), tutorial and survey papers (approximately 40 to 50 double spaced pages, 10 point font with an extensive bibliography), and short technical notes (less than ten pages). Excessively over-length research paper will be returned without review. Expanded versions of previously published conference research papers are encouraged as long as they contain at least 30% new material not previously published. Authors should indicate in a footnote on the first page where and when the previous paper appeared. Papers simultaneously submitted to multiple outlets will not be considered. Instructions to Authors The Journal of Emerging Technologies in Computing Systems invites submissions of original technical papers describing research and development in emerging technologies in computing systems. Major economic and technical challenges are expected to impede the continued scaling of semiconductor devices. This has resulted in the search for alternate mechanical, biological/biochemical, nanoscale electronic, asynchronous and quantum computing and sensor technologies. As the underlying nanotechnologies continue to evolve in the labs of chemists, physicists, and biologists, it has become imperative for computer scientists and engineers to translate the potential of the basic building blocks (analogous to the transistor) emerging from these labs into information systems. Their design will face multiple challenges ranging from the inherent (un)reliability due to the self-assembly nature of the fabrication processes for nanotechnologies, from the complexity due to the sheer volume of nanodevices that will have to be integrated for complex functionality, and from the need to integrate these new nanotechnologies with silicon devices in the same system. The journal provides comprehensive coverage of innovative work in the specification, design analysis, simulation, verification, testing, and evaluation of computing systems constructed out of emerging technologies and advanced semiconductors. Topics include, but are not limited to: Logic Primitive Design and Synthesis to design computational logic primitives from the new nanotechnologies and design tools supporting their effective design and verification, System-Level Specification, Design and Synthesis how to interconnect these computational primitives to build complete information systems, and design tools for specifying, synthesizing, and verifying such systems, Software-Level Specification, Design and Synthesis how to develop the necessary software so that applications can be effectively mapped onto information systems implemented using these new nanotechnologies, and tools for generating and verifying the software Mixed-Technology Systems how to interface across potentially hybrid nanotechnologies that may co-exist in the same information system. Manuscript Preparation  JETC is published quarterly and the online paper submission server is at http://acm.manuscriptcentral.com. Select the Journal of Emerging Technologies in Computing in the pull down menu option at ACM manuscript central submission page. Please open the link in a new window or tab to avoid any upload problems. Also please allow pop-up windows at manuscriptcentral page to complete your submission. JETC publishes research papers (approximately 20 double spaced pages, 10 point font), tutorial and survey papers (approximately 40 to 50 double spaced pages, 10 point font with an extensive bibliography), and short technical notes (less than ten pages). Excessively over-length research paper will be returned without review. Expanded versions of previously published conference research papers are encouraged as long as they contain at least 30% new material not previously published. Authors should indicate in a footnote on the first page where and when the previous paper appeared. Papers simultaneously submitted to multiple outlets will not be considered. Authors are required to prepare and submit their manuscripts electronically. This facilitates both a quicker editorial review process as well as facilitating electronic publication of accepted papers. While ACM admits a wide variety of formats for the electronic submission of accepted papers, the emerging technologies which support electronic publishing currently force us to impose some restrictions on submission for both review and final acceptance of manuscripts. Therefore for purposes of editorial review, JETC permits electronic submissions only in PDF or PostScript format. The technical contributions appearing in ACM JETC should be original papers which have not been published elsewhere. Simultaneous submissions to conferences and journals, and submissions that have already appeared in journals will be rejected by default. Publication of a previously published conference or workshop article that is available in a formal proceedings (with digital archival) is allowed only if the editor judges that (a) the revision contains significant amplification or clarification of the original material (30% or more new material), or (b) there is a significant additional benefit to be gained from journal publication e.g., one article that connects multiple previously published articles in a coherent manner where the integration of these articles provides additional insight on the approach or overall system. In either case, any prior appearance should be noted on the title page of the paper. Furthermore, author needs to prepare the following supporting documents: a brief note clearly indicating what constitutes the (30% or more) new material in the manuscript compared to the related article(s), and the related article(s) that are previously published or under review elsewhere. When there are any supporting documents (including the ones mentioned above), these documents should be attached to the end of the PDF file. Please submit only one PDF file that includes the manuscript, the note explaining the difference, and other supporting documents (in that order) Authors should also read the ACM policies on prior publications, simultaneous submissions, and plagiarism: ACM's Policy on Prior Publication and Simultaneous Submissions and ACM's Policy on Plagiarism, including self plagiarism. JETC authors should familiarize themselves with the ACM accepted manuscript preparation guidelines. Since these guidelines are in a state of transition with regard to electronic publication, the guidelines here take precedence whenever there is a conflict. Authors preparing manuscripts in Latex should (for now) use the Proposed JACM Article Formats style. We will soon have our own style guides which addresses more of the specific needs for electronic publishing. To ensure proper indexing, classification, retrieval and dissemination, authors must include five required information in the manuscript: i) descriptive title, ii) author names and affiliations, iii) abstract, iv) content indicators, and v) citations to relevant literature. The following serve as guidelines for the preparation of this material. Descriptive Title Select a title that accurately and clearly tells what the paper is about. Choose title terms as highly specific as content and emphasis of the paper permit. Avoid special symbols and formulas in titles unless essential to indicate content. Avoid cute or clever titles. Author Names and Affiliations Authors' names should be given without titles or degrees along with the name and address of the organization for which the work was carried out. A footnote on the first page should acknowledge funding sources and presentations, if any, of the material at technical meetings (give dates and sponsoring societies). The author's current address should be given in a footnote on the first page. Abstract The abstract should be from 150 to 200 words long and consist of short, direct, and complete sentences. It should be informative enough to serve in some cases as a substitute for reading the paper itself. It should state the objectives of the work, summarize the results, and give the principle conclusions. The title need not be repeated. Work planned but not done should not be described in the abstract. Because abstracts are extracted and used separately, do not use the first person, do not display mathematics, and do not use citation reference numbers. Try to avoid starting with the words "This paper ..." Content Indicators Three types of content indicators must be assigned: (1) categories and subject descriptors, (2) general terms, (3) keywords and phrases. The first two items are selected from the Computing Reviews Classification Scheme published in the January 1991 issue of Computing Reviews. Select as many of these as may be applicable. The keywords and phrases are additional English language words that indicate the content of the submission. They should not be synonymous with those already in the classification system : they can be more specific in relation to the paper than the subject descriptors, or they may not be covered by the existing system at all. The following guidelines may be helpful. Use important terms from the title; include their synonyms, related words and words of higher or lower generic rank. Use English nouns, or noun-noun and noun-adjective combinations; do not use hyphens except if the hyphenated parts are always treated as a single unit. Use specific terms whose meanings are generally accepted; do not use broad catchall terms (such as "computer", "automatic", "machine", "system", "discussion", "description"); do not use private terms or acronyms that may not be generally known. Do not use negative terms stressing what your paper does not do. Citations References to items in periodicals: These should take the form: author, title, journal, volume, number, date, pages. For authors, last names are given first, even for multiple authors; likewise for editors, with the name followed by (Ed.). The author's name always ends with a period, either the period which follows his initial, or a period for the purpose. The title has only the first word and proper names (or their derivatives) starting with capital letters, and it ends with a period. The date is given in parentheses. Example: 3. Jenkins, M. A., and Traub, J. F. Principles for testing zerofinding programs. ACM Trans. Math. Soft. 1, 1 (March 1975), 26-34. References to reports or proceedings: Author(s) name(s) and title (same style as above), report number, source including date and pages. References to books: Author(s) -- same style as in periodicals. Title -- all principal words start with a capital letter, and is set in italics. Include publisher, city, and year. Page or chapter references follow the year. Sequence: In the reference list, entries must be arranged alphabetically according to authors' or editors' names, or publishing organizations for items to which no names can be attached. The author names (and/or year) are used to cite the references in the text. Accuracy: Authors are responsible for checking that all information in the references is correct. Completeness: Include any and all information necessary for finding the work referenced. It is better to include more than enough information than too little information. Editorial Board Editor-in-Chief Krishnendu Chakrabarty, Duke University Department of Electrical and Computer Engineering Duke University Box 90291, 130 Hudson Hall Durham, NC 27708 Tel : +1 (919) 660-5244 Fax : +1 (919) 660-5293   Email: krish@ee.duke.edu http://people.ee.duke.edu/~krish/ Krishnendu Chakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively. He is now Professor of Electrical and Computer Engineering at Duke University. His research interests include: testing and design-for-testability of integrated circuits; digital microfluidics and biochips, circuits and systems based on DNA self-assembly, embedded systems, and wireless sensor networks. Prof. Chakrabarty is a Fellow of IEEE, a Golden Core Member of the IEEE Computer Society, and a Distinguished Engineer of ACM. In addition to serving as EIC for JETC, he serves as EIC for IEEE Design & Test of Computers, and as an Associate Editor of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Circuits and Systems II, and IEEE Transactions on Biomedical Circuits and Systems. Associate Editors Iris Bahar, Brown University, USA Division of Engineering Box D, Engineering Barus and Holley 322 Brown University Providence, RI 02912 Tel: +1 (401) 863-1430 Fax: +1 (401) 863-1157   Email: iris_bahar@brown.edu http://www.engin.brown.edu/facilities/LEMS/people/Faculty/Bahar/iris.html   Iris Bahar received the B.S. and M.S. degrees in computer engineering from the University of Illinois, Urbana-Champaign, in 1986 and 1987, respectively, and the Ph.D. degree in electrical and computer engineering from the University of Colorado, Boulder, in 1995. From 1987 to 1992, she was with Digital Equipment Corporation. Since 1996, she has been with the Division of Engineering, Brown University, Providence, RI, where she is currently an Associate Professor. Her research interests include computer architecture; computer-aided design for synthesis, verification, and low-power applications; and design, test, and reliability issues for nanoscale systems. In addition to JETC, Dr. Bahar is also an associate editor for the IEEE Transaction on Computer-Aided Design for Integrated Circuits and Systems (TCAD) and the IEEE Transactions on Very Large Scale Integration Systems (TVLSI). Suman Datta, Pennsylvania State University, USA 111K Electrical Engineering West The Pennsylvania State University University Park, PA 16802 Tel: +1 (814) 865-0519 Fax: +1 ((814) 863-5341   Email: sdatta@engr.psu.edu http://www.ee.psu.edu/faculty/datta/datta.asp   Suman Datta is Joseph Monkowski Associate Professor of Electrical Engineering at the Penn State University with a joint appointment with the Penn State Materials Research Institute. Suman received his Bachelors in Electrical Engineering from the Indian Institute of Technology, Kanpur, India, in 1995 and his Ph.D. in Electrical & Computer Engineering from the University of Cincinnati, USA, in 1999. As a member of the Logic Technology Development and Components Research Group at Intel Corporation, from 1999 to 2007, he was responsible for the demonstration of the world's first enhancement and depletion mode indium antimonide based quantum-well transistors operating at room temperature with record energy-delay product, the first experimental demonstration of high-k/metal-gate CMOS transistors employing strained silicon and silicon germanium channels with record performance, and the demonstration of high performance non-planar "Tri-Gate Transistors" for extreme scalability. Since 2007, he has been at Penn State University where his research group explores new materials, non-classical device architectures and novel circuit applications for CMOS "enhancement" as well as "replacement" for energy efficient computing applications. In 2009, his research group demonstrated the world's first compound semiconductor based inter-band tunnel transistors with record on-current. He has published over 66 archival refereed journal and conference publications and holds 96 issued US patents. Chris Dwyer, Duke University, USA Department of Electrical & Computer Engineering, and Department of Computer Science Duke University 209B Hudson Hall Box 90291 Durham, NC 27708 Tel: +1 (919) 660-5275     Email: dwyer@ece.duke.edu http://people.ee.duke.edu/~dwyer/   Chris Dwyer received a B.S. degree from the Pennsylvania State University, College Park, in 1998 and the M.S. and Ph.D. degrees from the University of North Carolina, Chapel Hill, in 2000 and 2003, respectively. He is currently an Assistant Professor of Electrical and Computer Engineering, and Computer Science at Duke University. Prof. Dwyer was awarded a Young Investigator Award from the Army Research Office in 2008, a Presidential Early-Career Award for Scientists and Engineers (PECASE), and is a member of DARPA’s Computer Science Study Group. His research interests include DNA self-assembly and its application to computational and sensor systems, self-assembled computer architecture, circuit design and fabrication, and modeling and simulation of nanoscale phenomena. Carlotta Guiducci, Ecole Polytechnique Fédérale de Lausanne (EPFL), Switzerland Institute of Bioengineering Ecole Polytechnique Fédérale de Lausanne (EPFL) BM 2110 (Bâtiment BM) Station 17 CH-1015 Lausanne - Switzerland Tel: +41 21 69 37813 Fax: ++41 21 69 31130   Email: carlotta.guiducci@epfl.ch http://personnes.epfl.ch/carlotta.guiducci   Carlotta Guiducci holds her PhD in Electrical Engineering from the University of Bologna (I). She was a postdoc at the Nanobiophysics Lab at Ecole Superièure de Physique et Chimie Industrielles Paris (F) between 2005 and 2007. She recently joined The Institute of Bioengineering at the Swiss Federal Institute of Technology in Lausanne (CH) where she holds a position as Tenure-Track Assistant Professor. Her research activity spanned from the characterization of MOS in quantic regime to the development of novel techniques for sensing biological affinity reactions on surfaces by means of semiconductor sensors and electronic transducers. Her laboratory team focuses on the design and application of electronic biosensors and are at the forefront of electronic engineering and bioengineering. The sensors address a wide range of applications, from nucleic acid, protein and drug detection to the measurements of bacterial metabolism and they are based on detection principles supporting electronic transduction, in order to couple directly and integrate the sensors themselves with electronic circuitry for data acquisition. Miniaturization of sensing site and the development of parallel systems are the main aims pursued. She has been invited speaker in several occasions at Stanford University (USA), Ecole Normale Superièure de Paris (France), Research Center Julich (Germany), Infineon Technologies (Germany) and she is reviewer of several international conferences and journals. Ramesh Karri, Brooklyn Polytechnic University, USA Department of Electrical and Computer Engineering Polytechnic Institute of New York University 6 Metrotech Center, Brooklyn, NY 11201 Tel: +1 (718) 260-4011   Email: rkarri@duke.poly.edu http://www.poly.edu/user/rkarri   Ramesh Karri is an Associate Professor in the Department of Electrical and Computer Engineering. Prof. Karri’s research interests are in the areas of computer-aided design of fault-tolerant nanoscale systems, secure hardware design, and computer-aided secure hardware design. Prof. Karri is the recipient of an NSF CAREER award, an Alexander Humboldt Fellowship and several grants including from the National Science Foundation, the Air Force Research Labs and Army. He has over 100 journal and conference publications in these areas. PhD students advised by him have been awarded prizes by the EDAA and by the IEEE TTTC. He has served on several program organizing and program committees including the IEEE Symposium on Hardware oriented Security, IEEE Workshop Fault Detection and Tolerance in Cryptography, and IEEE Symposium on Nanoscale Architecture. He chairs the IEEE Computer Society technical committee on Nanoelectronics, Nanoarchitectures and Nanocomputers. He has co-founded the IEEE/ACM Symposium on Nanoscale Architectures (NANOARCH) and served as the General Co-Chair of IEEE Nanoarch from 2004-2009 and currently serves on its steering committee. Karri received his MS in Computer Engineering at the University of California (1992), and his PhD in Computer Science also at the University of California (1993). Igor Markov, University of Michigan, USA The University of Michigan Dept of Electrical Engineering and Computer Science, ACAL Lab 2260 Hayward Ave Ann Arbor, MI 48109-2121   Tel: +1 (734) 936-7829 Fax: +1 (734) 763-4617   Email: imarkov@eecs.umich.edu   http://www.eecs.umich.edu/~imarkov/   Igor L. Markov is an associate professor of Electrical Engineering and Computer Science at the University of Michigan. He received his Ph.D. in Computer Science from UCLA. Currently he is a member of the Executive Board of ACM SIGDA, Editorial Board member of Communications of ACM, ACM TODAES, IEEE Transactions on Computers, IEEE Transactions on CAD, as well as IEEE Design & Test. Prof. Markov researches computers that make computers. He has co-authored two books and more than 160 refereed publications, some of which were honored by the best-paper awards at the Design Automation and Test in Europe Conference (DATE), the Int'l Symposium on Physical Design (ISPD) and IEEE Trans. on Computer-Aided Design. Prof. Markov is the recipient of a DAC Fellowship, an ACM SIGDA Outstanding New Faculty award, an NSF CAREER award, an IBM Partnership Award, a Microsoft A. Richard Newton Breakthrough Research Award, and the inaugural IEEE CEDA Early Career Award. Steven Nowick, Columbia University, USA Department of Computer Science Columbia University 508 Computer Science Building; Mail Code: 0401 1214 Amsterdam Avenue New York, NY 10027 Tel: +1 (212) 939-7056 Fax: +1 (212) 666-0140   Email: nowick@cs.columbia.edu http://www.cs.columbia.edu/~nowick/   Steven M. Nowick is a Professor of Computer Science and Electrical Engineering at Columbia University, and Chair of the Computer Engineering Program. He received a Ph.D. in Computer Science from Stanford University in 1993, and a B.A. from Yale University. His research interests include asynchronous and mixed-timing circuits, computer-aided digital design, low-power and high-performance digital systems, and logic synthesis. Dr. Nowick received an NSF Faculty Early Career (CAREER) Award (1995), an Alfred P. Sloan Research Fellowship (1995) and an NSF Research Initiation Award (RIA) (1993). He is also a Fellow of the IEEE (2009). He received Best Paper Awards at the International Conference on Computer Design (1991) and the IEEE Async Symposium (2000). In 2000, he was the recipient of two medium-scale NSF ITR awards for asynchronous research. In 2005, he was brought onto DARPA's CLASS project, headed by Boeing, to create a commercially-viable CAD tool flow for asynchronous systems. Dr. Nowick also co-founded the IEEE "Async" Symposia series and was Program Committee Co-Chair (1994, 1999) and General Co-Chair (2005). He was Program Chair of the 2002 IEEE/ACM International Workshop on Logic and Synthesis, Tools and Methodology Track Chair of the 2005 IEEE International Conference on Computer Design, and a Topic Area Chair for Design, Automation and Test in Europe (2009, 2010). He was also Guest Editor of a special issue of the journal, Proceedings of the IEEE, on asynchronous design (1999). He is currently an associate editor of IEEE Transactions on Computer-Aided Design and was formerly associate editor of IEEE Transactions on VLSI Systems. Bipul Paul , Toshiba America Research, USA Toshiba America Research 2590 Orchard Parkway San Jose, CA 95131   Tel: +1 (408) 526-2400 Fax: +1 (408) 526-2410 Email: bpaul@tari.toshiba.com   Bipul C. Paul is a Senior Research Scientist at Toshiba America Research. His research interest includes device and circuit design for emerging nanotechnology, statistical design for yield and reliability, 3D nanoarchitecture, and ultra-low power design. Dr. Paul has published more than 70 technical papers in international journals and conferences and 2 approved and several pending US patents. He received the Best Thesis award in 1999 and the IEEE VLSI Transactions Best Paper Award in 2006. Dr. Paul is also a Visiting Scientist at Stanford University, USA. Mehdi Tahoori, University of Karlsruhe, Germany CDNC - Chair for Dependable Nano Computing Department of Computer Science KIT - Karlsruhe Institute of Technology Building 07.21, Room B2-313.1 Haid-und-Neu-Str. 7 D-76131 Karlsruhe Germany   Tel: +49 721-608-7778 Fax: +49 721-608-3962   Email:  tahoori@informatik.uni-karlsruhe.de http://cdnc.itec.uni-karlsruhe.de/~tahoori   Mehdi Tahoori is a full professor and Chair of Dependable Nano-Computing (CDNC) at the Institute of Computer Science & Engineering (ITEC), Department of Computer Science, Karlsruhe Institute of Technology (KIT), Germany. He is also an adjunct professor of Electrical and Computer Engineering at Northeastern University, Boston, USA. He received his PhD and M.S degrees in Electrical Engineering from Stanford University in 2003 and 2002, respectively, and a B.S. in Computer Engineering from Sharif University of Technology in Iran, in 2000. In 2003, he joined the Electrical and Computer Engineering Department at the Northeastern University as an assistant professor where he promoted to the rank of associate professor with tenure in 2009. During 2002 to 2003, he was a research scientist at Fujitsu Labs of America working on reliability issues in deep sub-micron VLSI designs. In addition to five pending and granted U.S. and international patents for his work, he has over 100 publications in major journals and conference proceedings on wide-ranging topics from dependable computing and emerging nanotechnologies to system biology. His research interests include nano computing, reliable computing, VLSI testing, reconfigurable computing, emerging nanotechnologies, and system biology. He was a recipient of National Science Foundation (NSF) Early Faculty Development (CAREER) award. Yuan Xie, Pennsylvania State University, USA Department of Computer Science and Engineering Pennsylvania State University 354E Information Science Technology Building, University Park, PA, 16802   Tel: +1 (814) 865-7496 Fax: +1 (814) 865-3176   Email: yuanxie@cse.psu.edu http://www.cse.psu.edu/~yuanxie/   Prof. Xie received his B.S. degree from Tsinghua University, and his M.S. and Ph.D. degrees from Electrical Engineering Department, Princeton University. Prior to joining Penn State in Fall 2003, he worked as an Advisory Engineer for IBM Microelectronics Division's Worldwide Design Center. He was a recipient of the NSF CAREER award in 2006. His research interests include VLSI Design, Electronics Design Automation, Computer Architecture, Embedded Systems Design. Specifically, recent research projects he has been involved include EDA tools and architectures for 3D IC design, embedded system synthesis, low power and thermal-aware techniques, robust design techniques related to soft errors and process variation. JETC Information Director Theocharis (Theo) Theocharides Dept. of Electrical and Computer Engineering University of Cyprus 75 Kallipoleos Avenue P.O. Box 20537, Nicosia, 1678 Tel: +357 22892259 Fax: +357 22892260   Email: ttheocharides@ucy.ac.cy http://www.eng.ucy.ac.cy/theocharides/   Theocharis (Theo) Theocharides is a Lecturer in the Department of Electrical and Computer Engineering, at the University of Cyprus. Theocharis received his Ph.D. in Computer Science and Engineering from Penn State University, working primarily in the areas of low-power computer architectures and reliable system design. His general research area focuses on the broad design of intelligent embedded systems, with emphasis on the design of reliable and low power embedded and application specific processors, media processors and real-time digital artificial intelligence applications. His is interested in the integration of artificial intelligence in modern embedded systems for dynamic, autonomous and self-healing operation. He was honored with the Robert M. Owens Memorial Scholarship in May 2005. He is currently directing the Embedded and Application-Specific Systems-on-Chip Laboratory at the University of Cyprus. JETC Journal Administrator Kristen Rogers Dept. of Electrical and Computer Engineering Duke University Hudson Hall Room 116 Box 90291 Durham, NC 27708 Phone: +1 919 660 5406 Fax: +1 919 660 5293     Email: jetc-administrator@duke.edu   Kristen Rogers received her B.A. in Geography with a minor in Geology from the University of California Santa Barbara. She is the HR Administrator for the Department of Electrical and Computer Engineering at Duke University, where she oversees matters regarding employee hiring and orientation, payroll, and visa processing. In addition, she serves as the Journal Administrative Assistant for JETC.